Computers include general purpose central processing units (CPUs) that are designed to execute a specific set of system instructions. A group of processors that have similar architecture or design specifications may be considered to be members of the same processor family. Examples of current processor families include the Motorola 680X0 processor family, manufactured by Motorola, Inc. of Phoenix, Ariz.; the Intel 80X86 processor family, manufactured by Intel Corporation of Sunnyvale, Calif.; and the PowerPC processor family, which is manufactured by Motorola, Inc. and used in computers manufactured by Apple Computer, Inc. of Cupertino, Calif. Although a group of processors may be in the same family because of their similar architecture and design considerations, processors may vary widely within a family according to their clock speed and other performance parameters.
Each family of microprocessors executes instructions that are unique to the processor family. The collective set of instructions that a processor or family of processors can execute is known as the processor's instruction set. As an example, the instruction set used by the Intel 80X86 processor family is incompatible with the instruction set used by the PowerPC processor family. The Intel 80X86 instruction set is based on the Complex Instruction Set Computer (CISC) format. The Motorola PowerPC instruction set is based on the Reduced Instruction Set Computer (RISC) format. CISC processors use a large number of instructions, some of which can perform rather complicated functions, but which require generally many clock cycles to execute. RISC processors use a smaller number of available instructions to perform a simpler set of functions that are executed at a much higher rate.
The uniqueness of the processor family among computer systems also typically results in incompatibility among the other elements of hardware architecture of the computer systems. A computer system manufactured with a processor from the Intel 80X86 processor family will have a hardware architecture that is different from the hardware architecture of a computer system manufactured with a processor from the PowerPC processor family. Because of the uniqueness of the processor instruction set and a computer system's hardware architecture, application software programs are typically written to run on a particular computer system running a particular operating system.
A computer manufacturer will want to maximize its market share by having more rather than fewer applications run on the microprocessor family associated with the computer manufacturer's product line. To expand the number of operating systems and application programs that can run on a computer system, a field of technology has developed in which a given computer having one type of CPU, called a host, will include an emulator program that allows the host computer to emulate the instructions of an unrelated type of CPU, called a guest. Thus, the host computer will execute an application that will cause one or more host instructions to be called in response to a given guest instruction. Thus, the host computer can both run software design for its own hardware architecture and software written for computers having an unrelated hardware architecture. As a more specific example, a computer system manufactured by Apple Computer, for example, may run operating systems and program written for PC-based computer systems. It may also be possible to use an emulator program to operate concurrently on a single CPU multiple incompatible operating systems. In this arrangement, although each operating system is incompatible with the other, an emulator program can host one of the two operating systems, allowing the otherwise incompatible operating systems to run concurrently on the same computer system.
When a guest computer system is emulated on a host computer system, the guest computer system is said to be a virtual machine, as the host computer system exists only as a software representation of the operation of the hardware architecture of the guest computer system. The terms emulator and virtual machine are sometimes used interchangeably to denote the ability to mimic or emulate the hardware architecture of an entire computer system. As an example, the Virtual PC software created by Connectix Corporation of San Mateo, Calif. emulates an entire computer that includes an Intel 80X86 Pentium processor and various motherboard components and cards. The operation of these components is emulated in the virtual machine that is being run on the host machine. An emulator program executing on the operating system software and hardware architecture of the host computer, such as a computer system having a PowerPC processor, mimics the operation of the entire guest computer system. The emulator program acts as the interchange between the hardware architecture of the host machine and the instructions transmitted by the software running within the emulated environment.
The video graphics adapter (VGA) architecture of the 80X86 computer system architecture family has evolved over the history of the PC. The VGA system provides four-bit color up to 640×480 pixel resolution or 8-bit color up to 320×200 pixel resolution. The VGA architecture is an extension of earlier standards, such as monochrome display adapter (MDA) for simple black-and-white text, color graphics adapter (CGA) for simple 2-bit color and colored text modes, and enhanced graphics adapter (EGA) for four-bit color up to 320×200 resolution. The VGA architecture, which was complex at the time of its introduction, has only grown more complex with the more recent extensions to the standard. Much of the complexity of the VGA architecture stems from the implementation of backwards compatibility with the earlier standards. The layered extensions to the original VGA standard have resulted in the very complex operation of VGA graphics in modern PC systems. As a result, even the simplest of instructions to the VGA hardware can result in a complex set of operations in the VGA hardware. The complexity of the VGA hardware architecture is also affected by the number of VGA modes and the ability to modify the operation of the VGA hardware by changing register settings in the VGA hardware. The VGA modes include a number of read modes, write modes, ALU operation modes, and adjustable plane and pixel masks. Each of these operational modes may affect a single load or store to or from video RAM.
Attempting to account for the complexity of the VGA hardware architecture, including all of the permutations that can be introduced by the VGA operating modes and hardware register settings, makes instruction translation from the PC environment to another computer environment, such as the PowerPC environment, a difficult and time-consuming task. As an example, checking all of the VGA settings slows the emulator program. Thus, translating each instruction on the basis of the full potential of the VGA architecture results in slow emulation.
VGA hardware emulation must also differentiate regular instructions from those instructions directed to VGA hardware. The only difference between guest instructions directed to VGA hardware and regular load and store instruction is that the former instructions are mapped to memory associated with the VGA hardware while the latter instructions are mapped to main memory. Generally, an emulator translates guest instructions into a load or store instruction in the host environment. Because these instructions are regular host load and store instructions, the emulator requires a mechanism to detect when the instructions are directed to the emulated VGA hardware. Therefore, the emulator ensures that the guest virtual memory pages associated with VGA hardware instructions are not mapped to the host physical memory. As a result, those instructions directed to VGA hardware will normally cause a page fault error. Because the page fault handler can detect that VGA memory is involved, a function may be called to perform the task associated with the instruction.
However, incurring a page fault on every pixel write operation consumes a considerable amount of system resources because a typical VGA display resolution will have several thousand pixels. For example, a display resolution of 320×200 consists of 64,000 pixels. Therefore, it is desirable to minimize the occurrence of page faults. In order to minimize the number of page faults, it is preferable to patch the cached translated code associated with the guest instruction so that the page fault only occurs once. Essentially, when a page fault is detected, the store or load instruction that caused the page fault is replaced with a branch instruction to a function which handles all of the VGA modes but is executed under the emulator. Note that the emulator is not required to backpatch the translated code to properly emulate VGA operation. The emulator could handle all instructions directed to the VGA hardware entirely through the page fault mechanism, but thus would incur a serious performance penalty.
However, different VGA modes require a different number of instructions to perform a given action. Because there are several disadvantages associated with generating code inline, an emulator may replace the guest load or store instruction with a branch to a general purpose VGA function. This general purpose function is capable of handling all the various graphical operations. However, every time a pixel was written, this general purpose function had to test many or all of the various attributes to determine which code to execute. Commonly, the general purpose function performed all of the various graphical operations to the pixel, even if some of those stages or operations would have no effect on the final result. For example, a pixel masking operation that returned the entire pixel would be performed, even though this operation could be ignored. As a result, the performance of the emulator is adversely affected by having to perform these unnecessary operations.